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Verification Engineer (UVM)

Ref: 15108745

Posted on 04 August 2022
Job Location
Contract Type


Your Role:

As a (Senior) Verification Engineer you will be responsible for:

  • Definition of the Verification infrastructure, including test benches and Verification-IP for IP and SOC level verification to ensure high quality automotive designs.
  • Contributing to the definition of Verification requirements, Verification strategy and plan
  • Driving and participating to the execution of Verification plan within budget and timing constraint
  • Participation to Change Control Board, reviews, inspections, walkthroughs from the Verification perspective
  • Definition of state-of-art Verification methodologies and a mindset to continuous search for improvements of quality and efficiency.
  • Keeping your competence state-of-art in the field of Verification, and build up core competence in the Ethernet domain
  • Collaborate with other teams part of Product development (i.e. system, architecture, software, design, test engineering, application)


In this exciting role, you will have the chance to contribute to the key growth area for the future for our client and to build on the evolution towards self-driving cars.

Our client offers, among others, sensor and processing technology that drives all aspects of the secure connected cars of today and the autonomous cars of tomorrow. Their Product line In-Vehicle Networking (IVN) is the world’s leading supplier of integrated circuits for in-vehicle communication, ranging from LIN, CAN, to Ethernet PHYs and switches. In high-end vehicles, there are more than 100 transceivers inside the vehicle and thanks to our cient's market leadership; virtually every car produced in the world is equipped with at least one of their IVN products.

They work with all major automotive manufacturers and Tier 1s, and are recognized in the industry as the leader in performance, quality and technology. Our client has an international organization with offices in The Netherlands, India, China & Germany.


Experience Required:

  • Bachelor or Master's Degree, with more than 7 years’ experience in IC verification
  • Broad experience and knowledge of verification methodologies and tooling, including SystemVerilog, UVM, constraint random verification and assertions.
  • Knowledge of Industry standard protocols like USB, SPI, Ethernet, I2C, MII/GMII/RGMII, PCIe, SGMII, USXGMII
  • Understanding of PHY (SGMII/1000BT1/100BT1) application domain and implications on verification
  • Understanding of Ethernet switch application domain and implications on verification
  • Hands-on experience with scripting languages like Python and Perl
  • Experience with ARM processors and C-based verification is a strong benefit
  • Experience with FPGA and emulation is a strong benefit
  • Experience in participating in problem solving effort in the role of verification engineer

Soft skills

  • Proven to be an excellent communicator and team player with analytical skills and capability to easily switch between detail and helicopter view

Please contact:

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